As integration density of semiconductor devices increases, the area occupied by individual devices continues to shrink. Notwithstanding this, a capacitor for storing data of, for instance, a dynamic random access memory (DRAM) is required to have a sufficient capacitance, irrespective of the decrease in the area occupied by the capacitor. Accordingly, a metal-insulator-metal (MIM) capacitor, in which a lower electrode and an upper electrode are formed of metal and separated by a layer of insulating material, is being used in many integrated circuit products. Additionally, MIM capacitors have been used extensively in semiconductor devices that perform analog-to-digital conversions and digital-to-analog conversions. Conversion between analog and digital signals requires that capacitors employed in such conversion be stable, i.e., the capacitance of the capacitors must be relatively stable over a range of applied voltages and temperatures. The capacitance of capacitors with polysilicon electrodes tends to be relatively unstable since the capacitor structures tend to vary with changes in temperature and applied voltage. Accordingly, capacitors with polysilicon electrodes are typically not used for such conversion applications.
In forming the upper and lower metal electrodes of a MIM capacitor, an etching process is typically performed to pattern a metal layer. However, as the integration density of semiconductor devices continues to increase, it is becoming more difficult to etch such metal layers. In particular, copper which has good electro-migration resistance and a desirable low resistivity, can be difficult to etch. Accordingly, various methods for forming the upper and lower metal electrodes through a damascene process, that is, a process which does not involve etching a metal layer, have been proposed. See, for example, U.S. Letters Pat. No. 6,649,464 B2. A copper damascene process generally includes forming a trench for a copper structure in an insulation layer, forming a sufficient amount of copper to overfill the trench, and removing the excess copper from the substrate, thereby leaving the cooper structure in the trench. However, the damascene process used in forming copper-based capacitors and conductive lines and vias is time-consuming and expensive, and includes many steps, where chances for creating undesirable defects always exist.
Accordingly, there is a need for enhanced capacitor structures and formation processes, for example, for use in semiconductor device fabrication, which better integrate with conductive contact formation processing.